Modelsim Waveform

If you do not see the Wave pane, do not worry as you will show it in later steps. Quick Quartus: Verilog. But today morning after I rebooted my laptop and tried opening modelsim and repeating the same process, I am not able to see any waveform on the wave window. To view the signals in the top-level pll_ram. You cannot change the frequency of the wave, without changing the input frequency. Questa is Mentor's flagship product that has full System Verilog simulation support. Overrides 'MvcHome' modelsim. Modelsim Waveform Hi, is it possible to save the plot of a simulation in Modelsim? Thank you for your help. Simulation Signals added to a wave. Altera Corporation 1 December 2002, ver. I've checked that the binary number is correct, 64-bit fixed with 32 bits decimals. ! User Defined Radi4 "pus * signals &it > &it out radi4 :e& radi4 appears in pic% list Tcl command defines radi4. The delete command removes object from either list of wave window. † To add one or more values to the current list enter the following command: lappend WildcardFilter. Aleksandar Milenkovic Electrical and Computer Engineering The University of Alabama in Huntsville E-mail: [email protected] Here's another thought I had this problem after moving a simulation folder containing all my verilog and project files. 0d I make a simple project, using schematic (one and gate) an dthen make a test bench waveform. Bsp Schwarz in der. 1c - Unisim libraries for Modelsim PE - Ask for help on. 0 IDE with Modelsim-Intel is used for FPGA development and MAX 10 Development Kit with USB Bluster is needed as well. Business software downloads - ModelSim by Altera Corporation and many more programs are available for instant and free download. An example follows, but there is no guarantee that my way of running ModelSim is even close to optimal. If I understand what you're trying to do correctly, wave zoom full works for me. Here's another thought I had this problem after moving a simulation folder containing all my verilog and project files. Active-HDL Student Edition is a mixed language design entry and simulation tool offered at no cost by Aldec for students to use during their course work. seetime V Scroll List or Wave window to time (e. This document is for information and instruction purposes. The first thing that I thought was it is possible by using command line arguments. This lesson provides a brief conceptual overview of the ModelSim simulation environment. do as the file extensio. ModelSim is a program recommended for simulating all FPGA designs (Cyclone®, Arria®, and Stratix® series FPGA designs). Quartus-ModelSim: How to customize the waveforms to facilitate the debug In a previous blog I described how to customize the waveforms in ModelSim in the Xilinx ISE environment. 5 Post-Synthesis Simulation. Type in desired name, use *. Using ModelSim for Simulations with QuickLogic Devices Rev. It is recommended to pass the waveform configuration as the "custom_udo" file. Compiling and Installing GTKWave Unix and Linux Operating Systems Compiling GTKWave on Unix or Linux operating systems should be a relatively straightforward process as GTKWave was developed under both Linux and AIX. wlf file dataset save [dataset] [output file] You can also start vsim with the -wlf flag, which will automatically save the waveform to a. In integrated circuit design, waveform viewers are typically used in conjunction with a simulation. If modelsim has to fill in a wave window, a simulation takes longer as the necessary data is logged into memory rather than discarded. VHDL로 작성된. Follow the below steps for generating the waveforms, First, open the modelsim and click on 'compile' button and select all (or desired) files; then press 'Compile' and 'Done' buttons. 專案下載:AlteraAndOrTest. If I save the waveform, it is saved as a. I usually have script that runs all these setup operations for me (simulation, waveform window reloading and running): vsim -t 1ps design_tb restart -f -nowave do wave. vt” line, the XXX is your current input waveform file name too. Verilog for Simulation and Synthesis This chapter presents Verilog from the point of view of a designer wanting to describe a design, perform pre-synthesis simulation, and synthesize his or her design for programming an FPGA or generating a layout. motty schrieb: > I am using ModelSim SE and was wondering if there is a way to make a > waveform display mnemonics. It will also have a reset input. color, although it allows you to change all colors. To run the test suite you will need Python 2. 1c (for example when simulating a test bench module which has not any I/O pins/ports, the internal signals are necessary to be observable) as follows:. The goals for this lesson are: - Create a project. It's regarding the radix interpretation in the Sim/Wave window. For tutorials please google. (Be sure to add signals back to the waveform display. ModelSim Tutorial JEE2600 Page 15 We will validate this design by using the wave window available in Model Sim. Questa is Mentor's flagship product that has full System Verilog simulation support. A dialog box will pop up as shown below. Tutorial - Using Modelsim for Simulation, for Beginners. To view the signals in the top-level pll_ram. 04 is very simple. The deassign procedural statement ends a continuous assignment to a register. It is divided into fourtopics, which you will learn more about in subsequent. Modelsim SE is a simulation (and verification) environment from Mentor. You can follow all the directions as is except where you see questa. Quartus may not complain in some cases, but ModelSim will. 1 Set the graphic user interface to view the Wave debugging pane in the Main window. Select View -> Structure to view the hierarchy of the design and see the internal signals within the region selected in the main window. In the waveform pane, click and drag up and to the right. Then do add wave * to add all the signals from the current simulation. 04 [WARNING: Some people are reporting that following the steps for them does not fix the problem. FEATURE ModelSim PE ModelSim LE ModelSim SE GENERAL Licensing O- Floating License PTION Language Neutral License OPTI N ASIC Sign-Off IP Support HDL Editor Integrated Project Manager Source Code Templates & Wizards Platform-Independent Compiled Database Native-Compile Architecture Incremental Compilation 32/64-Bit Cross-Compatibility LANGUAGES. Simulation To give the. 2010 FYS4220/9220 Quartus II setup and use for the Modelsim–Altera simulator By Jan Kenneth Bekkeng, UIO. tree zoomin CR-40. Alternately, you could type \run -all" at the ModelSim command prompt in the main ModelSim window to run the testbench. After opening the project file (*. Installation If you want to use VHDL. 3bit Binary Counter for the Altera DEnano Development Kit. Waveform viewers comes in two varieties: Simulation waveform viewers. ModelSim SE Tutorial Software versions This documentation was written to support ModelSim SE 5. It is divided into fourtopics, which you will learn more about in subsequent. ENSC 350 ModelSim Altera Tutorial This is a quick guide get you started with the ModelSim Altera simulator. printing function, and that would be a very good addition to ISIM. tdo ModelSim waves format commands for post-par simulation Generally, the script file. Its implementation is based on single-cycle execution, meaning that each machine code (instruction) is. do) file that adds the following Tcl commands to ModelSim:. Since force commands (like all commands) can be included in a macro file, it is possible to create complex sequences of stimuli. the signal trace information from the most recent execution of the simulator. 1 Environment Setup and starting ModelSim The objective of this section is to learn how to get the environment ready for the tool, take care of the licensing issues, and start the tool. It is intended for a student in an introductory course on logic circuits, who has just started learningthis material and needs to acquire quickly a rudimentary understanding of simulation. Read more about this topic: Waveform Viewer Famous quotes containing the words list of and/or list : “ Religious literature has eminent examples, and if we run over our private list of poets, critics, philanthropists and philosophers, we shall find them infected with this dropsy and elephantiasis, which we ought to have tapped. Waveform Customization Process The different steps to follow to be able to customize the Wave View window panel in ModelSim when running the simulation flow in the Altera Quartus environment are: 1. Wang for ECE1411/ECE2411 students 06 - 15 - 2015The following notes are prepared for ECE1411/ECE2411 students to learn how to use Modelsim to simulate a 4-bit ripple carry adder and design and simulate a 8-bit ripple carry adder. (Entity 개념은 뒤에서 설명. The information in this manual is subject to change without notice and does not represent a commitment on the part of Model Technology. However Modelsim has a very useful waveform. 04 is very simple. If you plan on using OVM/UVM then you would want to go with Questa, otherwise Modelsim is good enough. Enter signal values using force. This command specifies the name of the vcd file to dump the waveform into: vcd file. Installation To get a license for wave. Create the sums. Many of the complex Verilog constructs related to timing and fine modeling features of this language. I write Verilog code to model an inverter logic gate, compile that Verilog code into a model whose behavior I can simulate, and simulate the behavior of that model, all within ModelSim Altera. 2 Application Note 204 AN-204-1. ModelSim - simulation software. FYS 4220/9220 Version 2, 19. ModelSim の File ⇒ Datasets ⇒ Open. wlf" file, which contains the waveform information for that run. wlf" file from within ModelSim as follows: Modelsim Prompt> vsim -view vsim. To be able to view the saved results, load up the "vsim. I write Verilog code to model an inverter logic gate, compile that Verilog code into a model whose behavior I can simulate, and simulate the behavior of that model, all within ModelSim Altera. ModelSim-Altera Starter Edition is a free program that has support for simulating small FPGA designs. 7e for UNIX and Microsoft Windows 98/Me/NT/2000/XP. Wave &indo& e4panded to s o& delta c anges. Support Online and email technical support options, maintenance renewal, and links to international support contacts:. A waveform viewer is a software tool for viewing the signal levels of either a digital or analog circuit design. 1 Introduction I’m not all that good at this stuff, so you might want to find a better tutorial. The CPU design has implemented only a few MIPS instructions. wlf" file from within ModelSim as follows: Modelsim Prompt> vsim -view vsim. Note: There are two parts to the simulation environment setup; the ModelSim simulation tool setup and the schematic capture setup. A simple triangle wave generator was designed in VHDL. You cannot change the frequency of the wave, without changing the input frequency. There was a problem with object deletion using the virtual commands. Start a terminal (the shell prompt). The sum of the sizes of all the ports in the top level module header. Tutorial on how to use ModelSim. …the boundary between science fiction and social reality is an optical illusion. v design, click the Sim tab. The value that we get back for Value Out is 4. printing function, and that would be a very good addition to ISIM. Afterwards the step like wave is filtered by a LPF and its output represents the desired sinusoidal wave. 6 that I just posted to sourceforge. Xilinx ISE 14. wlf" file from within ModelSim as follows: Modelsim Prompt> vsim -view vsim. ankfully, ModelSim has provided a simple explanation on the basic use of the application. ModelSim Tutorial, v6. Select File from the top menu, then click Save, (or by clicking on the Save button ) iii. sdo: the SDF file associated to this netlist. 04 Eclipse installation in ubuntu 12. The black and green section of ModelSim is the waveform area. 0 2Background ModelSim is a powerful simulator that can be used to simulate the behavior and performance of logic circuits. wlf" file, which contains the waveform information for that run. However, doing the save from the command line after the simulation has been run, will be safer in terms of overwriting old. seetime V Scroll List or Wave window to time (e. Then open the Virtual Machines folder in Programs menu and clicking on the shortcut in the Programs menu labeled XP32-201108-PUVVADA. Modelsim Tutorial Modelsim Tutorial. This document is for information and instruction purposes. Three, simulate the project. ModelSim Tutorial Zooming the waveform display Zooming lets you change the display range in the waveform pane. To view the signals in the top-level pll_ram. testbench specifies. ModelSim allows many debug and analysis capabilities to be employed post-simulation on saved results, as well as during live simulation runs. 5 Post-Synthesis Simulation. “Modelsim Script(Functional Simulation)” box, make sure on the “vlog –work work XXX. A waveform viewer is a software tool for viewing the signal levels of either a digital or analog circuit design. udo ModelSim user commands. color, although it allows you to change all colors. Some signals in my design are not visible in the “Objects” window, and so I can’t view their waveforms. " • Problem: Quartus can't make an association between some of the ports in your top level module and the actual hardware. ModelSim - Intel FPGA Edition Sim and Objects Windows 3. Use the Zoom->Zoom Full menu item in the wave window to expand the waveform display. The precision is fixed at 8 bits 2's complement format. 1 and ModelSim XE III/Starter 6. with the help of its simulation waveforms in Modelsim tool. STEP 2: In the terminal, execute the following command: module add ese461. I saw that the provided testbench does not have a timescale so I added it in, saved it, but never re-compiled. 3j, PE (Mentor Graphics) 2. v design, click the Sim tab. tree zoomrange CR-43 abort CR-44 add. 1c 9 Chapter 2 Conceptual Overview Introduction ModelSim is a verification and simulation tool for VHDL, Verilog, SystemVerilog, and mixed-language designs. ModelSim XE and ISim provide the same capabilities for customizing the waveform window, but do it differently. ModelSim is a high-performance digital simulator for VHDL, Verilog, and mixed- language designs. CosmosScope. ModelSim SE Command Reference Technical support and updates The Model Technology web site includes links to support, software updates, and many other information sources for both Model Technology and Mentor Graphics customers. The information in this manual is subject to change without notice and does not represent a. kukerlandia. ModelSim waveform viewer question Say a piece of code look like this: (please don't comment on the coding style which is actaully suggested by some verilog experts). After simulation, you can use the XESS Field Programmable Gate Array (FPGA) protoboard to verify your design on physical hardware. tdo ModelSim waves format commands for post-par simulation Generally, the script file. Importing ModelSim® Project into Active-HDL Introduction. 7c ‡ Licensing Wizard o No changes need to be made here, but this must be run to configure the license. 6d 11 Chapter 2 Conceptual Overview Introduction ModelSim is a verification and simulation tool for VHDL, Verilog, SystemVerilog, and mixed-language designs. ModelSim eases the process of finding design defects with an intelligently engineered debug environment. 1c (for example when simulating a test bench module which has not any I/O pins/ports, the internal signals are necessary to be observable) as follows:. Design a programmable square-wave generator circuit. 7e for UNIX and Microsoft Windows 98/Me/NT/2000/XP. 이 등록된 Entity를 이용해 시뮬레이션을 할 수 있다. This video provides an overview of Mentor Graphic's ModelSim software. 04 is very simple. Quick Quartus: Verilog. Generating HDL Code Coverage Using Simulink and Mentor Graphics ModelSim Coverage Using Simulink and Mentor Graphics ModelSim. The CPU design has implemented only a few MIPS instructions. do and middle_finder_wave. Common Problems with Quartus and ModelSim Quartus Warning: "No exact pin location assignments for [x] pins of [y] total pins. Here's a quick tutorial. For Quartus software v9. You will probably want to close all but the wave, signals, source and structure windows. In the command prompt type the following, run 20 eight times (i. main clear CR-37. To be able to view the saved results, load up the "vsim. ModelSim - Intel FPGA Edition Sim and Objects Windows 3. The syntax for specifying object names in ModelSim is as follows: [][][] [] where •datasetName — is the logical name of the WLF file in which the object exists. Mentor Graphics reserves the right to make changes in specifications and other information contained in this publication without prior notice, and the. edu In this tutorial you will learn to edit, compile, and simulate VHDL models. The rating is based on ITQlick expert review ModelSim Typical Customers ModelSim Features. Dentro de Modelsim hay que hacer una serie de pasos para poder agregar una variable el Waveform window:. You should see a blue line and numbers defining an area to zoom out. It is divided into fourtopics, which you will learn more about in subsequent. ModelSim Tutorial Starting the tool ß Start ‡ All Programs ‡ ModelSim XE II 5. kukerlandia. Unified mixed language simulation engine for ease of use and performance Native support of Verilog, SystemVerilog for design, and VHDL, for effective verification of sophisticated design environments. • die_dump_all_vcd_nodes. ModelSim을 이용한 시뮬레이션 • 아래쪽 Transcript 프롬프트에 run 1us 입력하여 시뮬레 이션을 시작할 수 있다. VHDL로 작성된. 1b Tutorial 1. 4a是由model公司推出的一款专业仿真软件,之前小编为大家提供过不同版本的Modelsim下载,这里为大家带来的是最新版本,可以完美兼容win7、win8等操作系统,不过win10系统暂未测试。. When debugging a Verilog project with ModelSim, you will be working mostly with the Wave window. Using ModelSim to Simulate Logic Circuits in Verilog Designs For Quartus Prime 16. wlf file dataset save [dataset] [output file] You can also start vsim with the -wlf flag, which will automatically save the waveform to a. ModelSim apears in two editions Altera Edition and Altera Starter Edition. Using ModelSim for Simulations with QuickLogic Devices Rev. Go to Assignments -> Settings and select Modelsim-Altera in the Tool name field. main clear CR-37. Dentro de Modelsim hay que hacer una serie de pasos para poder agregar una variable el Waveform window:. Even though you don't have to use projects i n ModelSim, they may ease interaction with the tool and are useful for organizing files and specifying simulation settings. Simple sine wave generator in VHDL Here is a sine wave generator in VHDL. This document is for information and instruction purposes. ModelSim SE GUI Reference Introduction ModelSim’s graphical user interface (GUI) cons ists of various windows that give access to parts of your design and numerous debugging tools. In the ModelSim-Altera software, on the Help menu, point to PDF Documentation, and then click User's Manual. ) Vsim > run 300 As expected, the output q displays the value '5' after a delay. Some of the windows display as panes within the ModelSim Main window, some display as windows in the Multiple Document. Altera Corporation 1 December 2002, ver. Simulate the design in the ModelSim-Altera software to generate a waveform display of the device behavior. A project is a collection entity for an HDL design under specification or test. When debugging a Verilog project with ModelSim, you will be working mostly with the Wave window. py --wave-gen This would make modelsim generate a. Mentor Graphics reserves the right to make changes in specifications and other information contained in this publication without prior notice, and the. udo ModelSim user commands. A RS-Latch in ModelSim -8- ii. It invokes the design under test, generates the simulation input vectors, and implements. There are numerous methods for zooming the display. If your input waveform file name is not “Waveform. tcl: a script file to record all signals during simulation. If you were using Cadence's NC-Verilog or NCVHDL, you would create a VCD file using a TCL command on the simulator's interface. Verilog Code for 4 bit Comparator There can be many different types of comparators. with the help of its simulation waveforms in Modelsim tool. 7c ‡ ModelSim Using the tool. 0 1Introduction This tutorial is a basic introduction to ModelSim, a Mentor Graphics simulation tool for logic circuits. b In the waveform pane, click and drag down and to the right. Tutorial - Using Modelsim for Simulation, for Beginners. Click in the waveform window to enable the Wave menu. Select the Switch Axis Mode icon (second icon from bottom) in the Waveform Window. Modelsim is an older product that has limited support for System Verilog. vcd & Figure 4 shows the GTKWave Waveform Viewer. Read more about this topic: Waveform Viewer Famous quotes containing the words list of and/or list : " Religious literature has eminent examples, and if we run over our private list of poets, critics, philanthropists and philosophers, we shall find them infected with this dropsy and elephantiasis, which we ought to have tapped. within a one- kilometer radius identified in writing to MTI. We are currently using Modelsim 6. I'm having the exact same issue with fedora 20 and modelsim 10. But I can't tell you how to create a VCD file here if you are using Modelsim to simulation your netlist. Simulating a Design Using ModelSim VHDL Compiler and Simulator Dr. ModelSim is capable of opening the file types listed below. seetime V Scroll List or Wave window to time (e. 3 Software License Agreement This is a legal agreement between you, the end user, and Model Technology Incorporated (MTI). Used Questasim and Modelsim before. For this design, a suitable scale is from 0 ps to about 200000 ps (200 ns) or 400000 ps (400 ns). free viewers are there. Getting Started with ModelSim Student Edition Digital Systems Design Using VHDL, 2nd Edition Page 9 of 10 Figure 12: Simulation Results The above waveforms show that q changes to the value of d 10 ns after the rising edge of. In the newly popped window select value as "0" or "1". After simulation, you can use the XESS Field Programmable Gate Array (FPGA) protoboard to verify your design on physical hardware. Modelsim > vsim -L alt_vtl test_ram Let's view the memory accesses one at time so we can see the impact of the timing details. The objective of this section is to learn how to create a new project, deal with ModelSim's text editor, and compile the created code. Dentro de Modelsim hay que hacer una serie de pasos para poder agregar una variable el Waveform window:. 0 2Background ModelSim is a powerful simulator that can be used to simulate the behavior and performance of logic circuits. ModelSim allows many debug and analysis capabilities to be employed post-simulation on saved results, as well as during live simulation runs. This lesson provides a brief conceptual overview of the ModelSim simulation environment. 5 Jump to solution. In digital electronics, an arithmetic logic unit (ALU) is a digital circuit that performs arithmetic and bit-wise logical. In the Wave window, if you do not want to use testbench, you can also specify the behaviors of your input waveforms, just like in Max+ Plus II. Mentor Graphics reserves the right to make changes in specifications and other information contained in this publication without prior notice, and the. wlf" file from within ModelSim as follows: Modelsim Prompt> vsim -view vsim. ModelSim is a package in Mentor Graphics and is used for logic simulation of HDLs. Estimated Time: 30 minutes. 專案下載:AlteraAndOrTest. You will probably want to close all but the wave, signals, source and structure windows. within a one- kilometer radius identified in writing to MTI. Are you telling Modelsim to search the libraries for you modules during elaboration? For example you should pass the following arguments to vsim: vsim -L lpm_ver Often pre-compiled Verilog libraries are suffixed "_ver" so make sure you are referencing the correct. Useful Modelsim Commands. Once the signals are in the Wave window, you can Restart the simulation by typing \restart -force". 4 Now run the simulator for sufficient time by typing the following command in the ModelSim main window: VSIM 4>run 20. Quick Quartus: Verilog. wlf" file, which contains the waveform information for that run. Modelsim's waveform viewer can read in vcd files, you need not migrate to any other viewer. You cannot change the frequency of the wave, without changing the input frequency. Its implementation is based on single-cycle execution, meaning that each machine code (instruction) is. Download and build the mips toolchain. 0 2Background ModelSim is a powerful simulator that can be used to simulate the behavior and performance of logic circuits. a)、ModelSim PE/DE/LE/SE (MentorあるいはModelSim 提供しているモノ) Mentorから購入の必要有り (個人で購入するには費用が高いです) また、ModelSimの上位版であるQuestaSimというものもあるがもっと高いです。. This lesson provides a brief conceptual overview of the ModelSim simulation environment. 2) Exit the current ModelSim session (needed for ModelSim for generate a proper VCD file) 3) ModelSim session and open the WLF file created in the step 1- File menu -> Open -> file2. 1d work on Ubuntu 14. Presented here is a clock generator design using Verilog that is simulated using ModelSim software. ModelSim waveform viewer question Say a piece of code look like this: (please don't comment on the coding style which is actaully suggested by some verilog experts). I write Verilog code to model an inverter logic gate, compile that Verilog code into a model whose behavior I can simulate, and simulate the behavior of that model, all within ModelSim Altera. I usually have script that runs all these setup operations for me (simulation, waveform window reloading and running): vsim -t 1ps design_tb restart -f -nowave do wave. The ADCs provide the MAX 10 devices with built-in capability for on-die temperature monitoring and external analog signal conversion. Start a terminal (the shell prompt). Most of this you will have to discover for yourself. You can do that using the Questa/Modelsim find command and the add wave just as shown above with a little TCL magic. Modelsim > vsim -L alt_vtl test_ram Let's view the memory accesses one at time so we can see the impact of the timing details. Mentor Graphics' Verification Academy is a first of its kind—unlike anything in the industry. testbench specifies. ModelSim을 이용한 시뮬레이션 • 아래쪽 Transcript 프롬프트에 run 1us 입력하여 시뮬레 이션을 시작할 수 있다. 4d installed with quartus v16. Step command executes the current line of the code and jumps to the next executable line. ModelSim Average Rating - The rating of ModelSim is 5 stars. However Modelsim has a very useful waveform. Please contact me if you find any errors or other problems (e. ModelSim initial screen. Custom WaveView also provides a host of capabilities for displaying, measuring, manipulating and saving simulation results. myAltera Sign In. Just by clicking on the icons your project files will get compiled, simulated and so on. If the ModelSim software you are using is a later release, check the README file that accompanied the software. 3 Key Commands add memory opens the specified memory in the MDI frame of the Main window add testbrowser adds. ModelSim window. Same information in list form. In this tutorial, we will show you how you capture the schematic design for the automatic door opener circuit using Altera Quartus II software. (HDL Designe. Custom WaveView also provides a host of capabilities for displaying, measuring, manipulating and saving simulation results. ModelSim XE uses standard Tcl commands for all waveform operations. > > During simulation you can see the values of a variable in a seperate > > ModelSim window: View => Variables > > Set a breakpoint in your VHDL code, where the variable is visible, and. Getting Started with ModelSim Student Edition Digital Systems Design Using VHDL, 2nd Edition Page 9 of 10 Figure 12: Simulation Results The above waveforms show that q changes to the value of d 10 ns after the rising edge of. The length of simulation can be change, the default is 100ps. VHDL로 작성된. Expand the detached window. 메뉴에 보면 Run 타임 줘서 실행시키는것이 있음. do」コマンドを実行するだけで、シミュレーション評価ができます。 プロジェクトフォルダは、以下のような構成となります。 慣れてしまえば、新規でプロジェクトを準備するのも. a) MODELSIM Simulator Double-click on the Simulate Behavioral VHDL Model process to launch the ModelSim Simulator - ModelSim starts and displays many windows! Go to the Waveform Viewer window and zoom back out to see the results of your simulation:. Once the signals are in the Wave window, you can Restart the simulation by typing \restart -force". Use the Zoom->Zoom Full menu item in the wave window to expand the waveform display. Do not check the "Run gate-level simulation automatically after compilation" box. Simulate the design in the ModelSim-Altera software to generate a waveform display of the device behavior. There are four basic steps to using the development kit. modelsim install - how to install modelsim on MAC? - Differences between Modelsim and Modelsim-altera - the path of modelsim. STEP 1: login to the Linux system on.